IRS2111(S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions. Additional information is shown in Figs. 7 through 10.
Symbol
V B
V S
V HO
V CC
V LO
V IN
dV s /dt
Definition
High - side floating supply voltage
High - side floating supply offset voltage
High - side floating output voltage
Low - side and logic fixed supply voltage
Low - side output voltage
Logic input voltage
Allowable offset supply voltage transient (Fig. 2)
Min.
-0.3
V B - 25
V S - 0.3
-0.3
-0.3
-0.3
Max.
625 (Note 1)
V B + 0.3
V B + 0.3
25 (Note 1)
V CC + 0.3
V CC + 0.3
50
Units
V
V/ns
P D
Rth JA
T J
T S
T L
Package power dissipation @ T A ≤ +25 ° C
Thermal resistance, junction to ambient
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
(8 Lead PDIP)
(8 lead SOIC)
(8 lead PDIP)
(8 lead SOIC)
-55
1.0
0.625
125
200
150
150
300
W
° C/W
° C
Note 1: All supplies are fully tested at 25 V, and an internal 20 V clamp exists for each supply
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The V S offset rating is tested with all supplies biased at a 15 V differential.
Symbol
V B
V S
V HO
V CC
V LO
V IN
T A
Definition
High - side floating supply absolute voltage
High - side floating supply offset voltage
High - side floating output voltage
Low - side and logic fixed supply voltage
Low - side output voltage
Logic input voltage
Ambient temperature
Min.
V S + 10
Note 2
V S
10
0
0
-40
Max.
V S + 20
600
V B
20
V CC
V CC
125
Units
V
° C
Note 2: Logic operational for V S of -5 V to +600 V. Logic state held for V S of -5 V to -V BS . (Please refer to the Design Tip
DT97-3 for more details).
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